JERRY G. FOSSUM
Distinguished Professor Emeritus

 

Education:

PhD, EE, University of Arizona, 1971
MS, EE, University of Arizona, 1969
BSEE, University of Arizona, 1966

Contact Information:

Email: fossum@tec.ufl.edu
Phone: 352-392-4921
Office: 541 New Engineering Building

Program Affiliation:

Area:  Devices
Lab:   Silicon-on-Insulator (SOI) Group/Lab

Fields of Interest:

• Semiconductor device theory, modeling, and simulation
• Nanoelectronics, integrated circuits, intergrated circuit technology computer-aided design
• Non-classical silicon-on-insulator and multi-gate CMOS

Employment:

2006 - Distinguished Professor, Electrical & Computer Engineering, University of Florida
1980 - Professor, Electrical & Computer Engineering, University of Florida
1978 - Associate Professor, Electrical & Computer Engineering, University of Florida

Refereed Journals in the Last 3 Years:

2009
S. Chouksey, J. G. Fossum, A. Behnam, S. Agrawal, and L. Mathew, “Threshold Voltage Adjustment in Nanoscale DG FinFETs via Limited Source/Drain Dopants in the Channel,” IEEE Trans. Electron Devices, vol. 56, 2009.

Z. Zhou, J. G. Fossum, and Z. Lu, “Physical Insights on BJT-Based 1T DRAM Cells,” IEEE Electron Device Lett., vol. 30, pp. 565-567, May 2009.

Z. Lu, J. G. Fossum, J.-W. Yang, H. R. Harris, V. P. Trivedi, M. Chu, and S. E. Thompson, “A Simplified, Superior Floating-Body/Gate DRAM Cell,” IEEE Electron Device Lett., vol. 30, pp. 282-284, March 2009.

2008
S. Agrawal and J. G. Fossum, “On the Suitability of a High-k Gate Dielectric in Nanoscale FinFET-CMOS Technology,” IEEE Trans. Electron Devices, vol. 55, July 2008.

Z. Lu, J. G. Fossum, W. Zhang, V. P. Trivedi, L. Mathew, and M. Sadd, “A Novel Two- Transistor Floating-Body/Gate Cell for Low-Power Nanoscale Embedded DRAM,” IEEE Trans. Electron Devices, vol. 55, June 2008.

S. Chouksey and J. G. Fossum, “DICE: A Beneficial Short-Channel Effect in Nanoscale Double-Gate MOSFETs,” IEEE Trans. Electron Devices, vol. 55, pp. 796-802, March 2008.

2007
V. P. Trivedi, J. G. Fossum and W. Zhang, “Threshold Voltage and Bulk-Inversion Effects in Nonclassical CMOS Devices with Undoped Ultra-Thin Bodies,” Solid-State Electron., vol. 51, pp. 170-178, Jan. 2007.

Z. Lu and J. G. Fossum, “Short-Channel Effects in Independent-Gate FinFETs,” IEEE Electron Device Lett., vol. 28, pp. 145-147, Feb. 2007.

J. G. Fossum, “Physical Insights on Nanoscale Multi-Gate CMOS Design,” Solid-State Electron., vol. 51, pp. 188-194, Feb. 2007.

M. M. Chowdhury, V. P. Trivedi, J. G. Fossum, and L. Mathew, “Carrier Mobility/Transport in Undoped-UTB DG FinFETs,” IEEE Trans. Electron Devices, vol. 54, May 2007.

J. G. Fossum, Z. Lu, and V. P. Trivedi, “New Insights on “Capacitorless” Floating-Body DRAM Cells,” IEEE Electron Device Lett., vol. 28, 2007.

S.-H. Kim and J. G. Fossum, “Design Optimization and Performance Projections of Double- Gate FinFETs with Gate-Source/Drain Underlap for SRAM Application,” IEEE Trans. Electron Devices, vol. 54, 2007.

Contracts and Grants:

• Samsung Elecronics Co., "Simulation-Based Assessment of Multi-Gate CMOS Devices and Circuits, Including FinFETs"
• National Science Foundation, "Modeling, Design, and CMOS Performance Projections of Nanoscale Cougle-Cate FinFETs"
• Freescale, "Process-Based Compact MOSFET Modeling, and Extremely Scaled CMOS Applications Thereof"

Honors and Awards:

2009 - Life Fellow, Electron Devices Society
2005-2008 - Who’s Who in American Education
2004 - IEEE Electronic Devices Society J. J. Ebers Award
2000 - American Men and Women of Science
1996-1998 - American Men and Women of Science
1996 - UF Professional Excellence Award
1994-2006 - Who's Who in America
1994 - American Men and Women of Science
1992 - Who's Who in America
1992 - American Men and Women of Science
1990 - Who's Who in America
1989 - American Men and Women of Science
1988-1992 - UF "Top 100 Researcher"
1988 - Who's Who in America
1986 - Who's Who in America
1986-1988 - UF "Top 50 Researcher"
1984 - Who's Who in America
1983 - Fellow, Electron Devices Society
1980 - Outstanding Young Men in America
1979 - ASEE (Southeastern Section) Award for Outstanding Contribution in Research

Patents and Copyrights

• U.S. Patent No. 4,343,962,“Oxide Charg eInduced High Low JunctionEmitterSolarCell” with A. Neugroschel, S. C. Pao, F. A. Lindholm, and C. T. Sah, Aug. 10, 1982.
• Software Copyright: “SOISPICE,” 1988, 1992, 1994, 1996, 1997, 1998, 2000.
• Software Copyright: “MMSPICE,” 1989.
• Software Copyright: “SUMM” with K. R. Green, 1990.
• Software Copyright: “UFET/API,” 1997, 1999.
• Software Copyright: “UFSOI(w/UFPDB)/API,” 1997, 1998, 1999, 2001, 2002.
• Software Copyright: “UFDG/API,” 2001, 2002, 2003, 2004, 2005, 2006, 2007.
• U. S. Patent (No. 6,498,371): “Body-Tied-to-BodySOI CMOSInverter Circuit” withS. Krishnan and M.-H. Chiang, Dec. 24, 2002.
• U. S. Provisional Patent Application: “Two-Transistor Floating-Body Dynamic Memory Cell” with L. Mathew, M. Sadd, and V. P. Trivedi, Oct. 2007; rev. Dec. 2007.
• International Patent Application: “Two-Transistor Floating-BodyDynamic MemoryCell” with L. Mathew, M. Sadd, and V. P. Trivedi, Oct. 2008.
• U. S. Patent (No. 7,470,951): “Hybrid-FETandItsApplicationasSRAM”withL. Mathew, Dec. 30, 2008.
• U. S. Provisional Patent Application: “Floating-Body/GateDRAMCell”withZ. Lu, Jan. 2009.