ANT URAL
Assistant Professor

 

Education:

PhD, EE, Stanford University, 2001
MS, EE, Stanford Universtiy, 1997
BSE, EE, Princeton University, 1995

Contact Information:

Email: antural@ece.ufl.edu
Phone: 352-392-9753
Office: 555 New Engineering Building

Program Affiliation:

Area:  Devices
Lab:   www.nano.ece.ufl.edu

Fields of Interest:

• Nanoscience and nanotechnology
• Carbon nanotubes
• Semiconductor nanowires

Employment:

2003 - Assistant Professor, Electrical & Computer Engineering, University of Florida

Refereed Journals in the Last 3 Years:

2007
A. Behnam, Jing Guo, and Ant Ural, “Effects of nanotube alignment and measurement direction on percolation resistivity in single-walled carbon nanotube films,” Journal of Applied Physics 102, 044313 (2007).

A. Behnam and Ant Ural, “Computational study of geometry-dependent resistivity scaling in singlewalled carbon nanotube films,” Physical Review B 75, 125432 (2007).

A. Behnam, Y. Choi, L. Noriega, Z. Wu, I. Kravchenko, A. G. Rinzler, and Ant Ural, “Nanolithographic patterning of transparent, conductive single-walled carbon nanotube films by inductively coupled plasma reactive ion etching,” Journal of Vacuum Science and Technology B 25, 348 (2007).

2006
Y. Choi, J. Sippel-Oakley, and Ant Ural, “Single-walled carbon nanotube growth from ion implanted Fe catalyst,” Applied Physics Letters 89, 153130 (2006).

Y. Choi, J. Johnson, R. Moreau, E. Perozziello, and Ant Ural, “Micromachined silicon transmission electron microscopy grids for direct characterization of as-grown nanotubes,” Nanotechnology 17, 4635 (2006).

A. Behnam, L. Noriega, Y. Choi, Z. Wu, A. G. Rinzler, and Ant Ural, “Resistivity scaling in singlewalled carbon nanotube films patterned to submicron dimensions,” Applied Physics Letters 89, 093107 (2006).

Patents:

• US patent application and Stanford University Docket #03-293, "Low temperature growth of single-walled carbon nanotubes with PECVD" with Hongjie Dai, Steven Hung, and James Gibbons
• US patent application, "Room temperature singled-walled carbon nanotube integrated on CMOS”, Figueiredo et al.