Dates: 
Mar 29 2017 - 1:00pm

Date: March 29, 2017

Time: 1:00 PM

Location: 234 Larsen Hall

Gainesville, FL

Find our location:

https://goo.gl/maps/iCmpj7Gbehn

 

ECE Seminar Speaker Yingyan "Celine" Lin

University of Illinois at Urbana Champaign

Biography:

Yingyan (Celine) Lin is a Ph.D. candidate in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign (UIUC). She is advised by Professor Naresh Shanbhag and expects to receive her Ph.D. degree in June, 2017.

Her research interests primarily include analog and mixed-signal circuits for I/O interfaces, error resiliency techniques, and VLSI circuits and architectures for machine learning on resource-constrained platforms. She is the first author of 11 peer-reviewed publications on these subjects and she also designed three high-speed interface circuit IPs for large flat panel display applications that were acquired by TOSHIBA Microelectronics Corporation in Japan. Celine received the second place Best Student Paper Award at the 2016 IEEE International Workshop on Signal Processing Systems and is the recipient of the 2016 Robert T. Chien Memorial Award at UIUC for Excellence in Research.

 

Seminar Talk Title: “Energy-efficient Systems for Information Processing and Transfer”

Abstract:  

Machine learning (ML) algorithms are increasingly pervasive in tackling the data deluge of the 21st Century. Current ML systems adopt either a centralized cloud computing or a distributed mobile computing paradigm. In both paradigms, the challenge of energy efficiency has been drawing increased attention. In cloud computing, data transfer due to inter-chip, inter-board, inter-shelf and inter-rack communications (I/O interface) within data centers is one of the dominant energy costs. This will only intensify with the growing demand for increased I/O bandwidth for high-performance computing in data centers. On the other hand, in mobile computing, energy efficiency is the primary design challenge, as mobile devices have limited energy, computation and storage resources. This challenge is being exacerbated by the need to embed ML algorithms, such as convolutional neural networks (CNNs), for enabling local on-device inference capabilities.

In this talk, I will present holistic system-to-circuit approaches for addressing these energy efficiency challenges. First, I will describe the design of a 4 GS/s bit-error-rate optimal analog-to-digital converter in 90nm CMOS and its use in realizing an energy-efficient 4 Gb/s serial link receiver for I/O interface. Measurement results have shown that this technique provides a promising solution to the well-known interface power bottleneck problem in data centers. Next, I will describe two techniques that can potentially enable on-device deployment of CNNs by significantly reducing the energy consumption via algorithmic/architectural innovation. Finally, I will identify future research directions in the emerging areas of machine learning on resource-constrained silicon platforms.


You are invited to attend the ECE Seminar presented by Yingyan (Celine) Lin, University of Illinois at Urbana Champaign